Quote from: dhouse on May 30, 2018, 05:21:41 PM

Quote from: whitefire990 on May 30, 2018, 04:54:46 PM

So, today is 5/30, the target launch day. The website and initial downloads will be up by tomorrow night (5/31 late in the evening). I will post again once it is live.

Is there any way to actually get the cards at this point? Jason from Avnet never got back to me.

We're working on it. It's slow going but i'm cautiously optimistic about what the next couple of weeks worth of meetings would hold for myself and others in this thread.

Also, my project is unrelated to whitefire's other than we've been doing the same things independently. We're not the only 2, there are a few in this thread that have all been doing the same thing in secret for quite awhile now. His performance is much better than mine (and some of the others) for these logic based algos. I haven't seen him mention any numbers for memory algos, but I believe my numbers may end up higher than his there. This is why I'm in favor of a community shell and community bitstreams. There may be others in the community who can achieve performance even better than myself and whitefire! Let's see what the community engineers can do

Quote from: ilia_2s on May 30, 2018, 06:47:52 PM

Quote from: whitefire990 on May 30, 2018, 04:53:45 PM

The bandwidth between the two FPGA's is 320GBps which supports the 512 bit intermediate result x 625MHz, so the hash rate of two FPGA's connected does not suffer from the interconnect.

Its true for theoretical bandwidth in datasheet. Yes, but not in real implementation. Even if you have a 320GBps between FPGA you can reach only 320 000 / 512 = 625 MHash/sec. But in real project it will have additional speed lost in input/output part.

Not necessarily. #1) Really short < 1m distance. #2) We're not required to follow any sort of network level protocol. One of the engineers I'm working with was operating 10Gbps over distance using 2 pins from the FPGA.