Quote from: zefir on January 10, 2014, 08:21:50 AM

Correctioin: Level Shifters mandatory

Quote from: zefir on January 07, 2014, 06:48:30 PM

Well, as pure SW guy I can provide only limited HW related feedback, so please double check.

Quote from: MrTeal on January 07, 2014, 01:18:26 AM

I have both a level shifter and the option to use an inline resistor to drop the 3.3V signal down to 1.8V on my test board similarly to how some Bitfury designs have implemented it. Have you investigated doing that, or just feeding 3.3V straight in?

I understood that the eval board used in China (the one you saw in the pictures) for testing has a level shifter for input and output signals, while Bitmine's boards use resistors to lower the input signals and a level shifter for the output signal (MISO) - seem to work both.

This seems to be true only for lower clock frequencies. As we approach the nominal clock range, the different delays within resistor network and integrated level shifter add up to a skew large enough to corrupt SPI communication. This is still being tested, but if you want to be on the safe side, use integrated level shifters for all signals to your uC (if its IO is not 1.8V).

Resitor tolerances for all chosen resistors for DIY 2xA1 PCB are 5% or worse. Such resistor tolarance makes driver software a difficult time to manage voltage levels on A1 since you don't know which one (voltage) will pop up and we talk second and third digit after decimal point of value.

Available resistor tolerances to choose from (parts), of course, much expensive but which might not trigger SPI corruption are :

resistor parts with available tolerances :

+/-0.01%
+/-0.02%
+/-0.05%
+/-0.1%
+/-0.2%
+/-0.25%
+/-0.5%
+/-1%
+/-2%
etc...

Any of them would work better then components currently chosen for DIY PCB.

Also capacitors chosen, are even worse, since they have 10% & 20% tollerance.
Why ?

Capacitors (e.g. ceramic) with available tolerances exist :
+/- 0.05 pF
+/- 0.075 pF
+/- 0.075 pF
+/- 0.2 pF
+/- 0.25 pF
+/- 0.5%
+/- 1%
+/- 2%
+/- 2.5%
etc...

Would it be a much lesser problem to overclock the board and chips if we would deal with high grade components (with less tolerance and proper higher power rating for overclocking) ? I think - yes, and until that happens, sqeezing any more # from A1 would be magic.

There is also Tempreature coefficient for every professional component.

To choose from you have following TCs:

A,B, BG, BP, BR, BX, C, C0G, NP0, C0H, C0J, C0K, CH, D, E, F, H3M, M3K, N1500, N2000, N2200, N2500, N2800, N4700, N750, P2G, P2H, P3K, P90, R, R2H, R3A, R3L, S2H, S3B, S3L, S3N, SL, SL/GP, T2H, U2J, U2M, X5E, X5F, X5P, X5R, X5S, X5U, X5V, X6S, X6T, X6R, X7R, X7S, X7T, X7U, X8G, X8L, X8R, X8Y, 5F, Y5P(B), Y5R, Y5S, Y5U (E), VF, Z4V, Z5P , Z5T, Z5U, Z5V, ZM

Can anyone address this ?