do we even have eASIC chips?
Uhm no, we don't. He has been pretty clear about that (the RTL stuff). The situation is actually much, much worse than I thought.
Due to huge gaps in my knowledge I am unsure what some of the terms mean.
RTL is the design before an ASIC gets commissioned correct? So if we have to get another RTL that means the ASIC can't exist at all right?
However Ken has said that we are not respining the chip, so I assumed that mean that the chips sort of exist?
I am confused about how we don't need to respin (whatever that means) but we are still working on RTL.
Gladly, it seems "respin" doesn't take that long using eASIC:
San Jose, California, April 25, 2005 — eASIC® Corporation, a provider of Configurable Logic and Structured ASIC products, today announced that its customer STMicroelectronics achieved 24 hours turnaround from RTL to tape-out using eASIC’s Structured eASIC technology. ST has licensed eASIC’s 0.13µ eASICore® for the rapid customization of a printer platform, which allows ST to offer fast and easy customization of a printer system controller, as well as image processing personalization, in a standard pre-verified printer-engine architecture. ST’s engineering team was able to ship the final GDS-II files to the silicon fab for eBeam customization in less than a day from the time RTL was received. The eBeam customization, which is maskless, takes only a few hours for Structured eASIC devices since just a single Via layer needs to be written.