My original point is that you won't see double transistor count after a die shrink. Sure, manufacturers want to maintain an edge over their competition by rearchitecting the core or making other enhancements, but it's just naive to think that a core shrink from 40nm to 28nm will yield double performance.
Huh? AMD did precisely that when going from 55nm (HD 4870 =
800 ALUs) to 40nm (HD 5870 =
1600 ALUs).
They will do the same from 40nm to 28nm.
In fact it will be a bit easier this time to double performance because 55**2/40**2 = 1.89 but 40**2/28**2 = 2.04.