Congratulations and great job!

Just curious: are you actually mining on the chip, or is this just confirmation that the JTAG works and you're able to upload a bitstream?

I ask because designing a stable, properly-decoupled power supply for FPGAs isn't always easy... although for something as small as an LX25 you can get a way with a whole lot.  The Spartan6-150 with a full chip design (~50% LUT/FF usage) at a decent clock rate will be a good test.

  -ec

PS, speaking of clock rate, where's the clock signal coming from?