Quote from: spoonbandits on January 24, 2021, 12:55:17 AM

Quote from: NotFuzzyWarm on January 08, 2021, 01:39:56 AM

using a 300mm wafer with 5x5mm die w/0.25mm scribe lines & default edge loss and excellent 97% good yield produces 2,248 usable dies per that yield calculator.

Given the still short good-enough-for-production age of 7-5nm tech and increasing defect rate to 5 per sqcm still gives 88% yield and 2,017 usable chips per wafer. Not bad but do remember that calculator and most others do not predict speed performance which can vary quite widely. The calculators only account for hard faults.

Regarding how much real estate the chip has: Like gpu chips that is because they DO contain a massive amount of transistors used as cores. Unlike gpu's, mining ASIC cores are far more simple as they cannot be programmed on-the-fly - that translates into fewer connections to now unneeded different intermediate circuits. Space needed by intermediated circuits now goes to more identical cores so just a few litho masks needed to create and connect the logic circuits. For some reason for the T15 chips, 256 cores per chip rings a bell... Odds are the s17 & 19 pack in even more. Good part about that is that a chip can have many dead cores from a hard defect but the chip is still usable, just lower number of cores cycling per clock.

End result is why I can see the chips being what I consider amazingly inexpensive. I can also see why TSMC and other Foundries have now given the <7nm mining chips a lower priority over much more complex and ergo higher value chips. Not exactly fair considering that from what I've seen, since around start of the 16nm node miner chips have been rather excellent mass-production testbeds for the Foundries. Yeah, Apple et al paid for the research to do it but making the simple and very fault tolerant miner chips gave TSMC and Samsung the expertise to use those nodes to produce chips en-masse.

That said, there is still very limited production capacity for chips using the still at cutting edge <7nm nodes. That will not change for several years. Only 1 company makes the EUV stepper/scanners used for the photolithography and they are very massive and complex beasts that cannot be mass produced. The handfull of foundries that can produce the chips - Intel, TSMC, Samsung, and Global all need them. I'll have to find the article but as I recall they can make only a couple dozen per year,

Awesome post, thank you. Been trying to dig up info on the process as a newbie and this was super informative.

A question i posed in another thread: I get that these manufacturers are based in China, but do any of the US based foundries have this type of tech? I recall TI having capabilities for ~20nm in Texas but thats as far as I got with my research. I was using this list and then cross referencing the company websites:
https://en.wikipedia.org/wiki/List_of_semiconductor_fabrication_plants

*EDIT - Scratch that, looks like Intel in the Pacific Northwest is the only place with that type of capability.

There are several producers of EUVL production equipment.

Though ASML (dutch company) produces super majority of the machines.

The make around 50 machines per year.

Majority of the machines are sold to tsmc and samsung for their 5 nm chip production.

Btw. why was the production cost question reported and deleted?

I could also rephrase and ask how the production cost for BTC could develop in the next 6 months.