Quote from: amix on March 19, 2014, 06:33:38 PM

from the gridseed gc3355 datasheet :

CLUS_ADDR=0xE
REG ADDR
(8 bits)

0x0

[30]pll_BS
0 PLL Band Select
1: High band, 500MHz<=Fvco<=1GHz
0: Low band, 300MHz<=Fvco<=600MHz

the default is 0 so it might requirw a software mod to modify the reg addr to the higher band? or is it already enabled? thought of this as i recall the the PLL voltage being modifed somewhere.. stab in dark maybe.........

GridSeed docs are actually wrong, pll_BS is bit 31, and pll_BP is probably bit 30. If you look at the frequency tables in cgminer, you'll see that for frequencies >= 500 MHz, the highest bit is set.