I honestly wonder: why hasn't anyone created yet an algo that randomly changes parts of itself every x blocks? This would make ASICs impossible, and only FPGA possible to use, thus limiting the issue a lot...
No, it won't, it's just a matter of the software.
For the moment the only method to secure against ASICs is a combination of algos for which there are no ASICs.
A real rat race. But funny. I like it.
An opportunity to call out people for their true motives.