Quote from: 2112 on April 12, 2014, 08:20:40 PM

Quote from: Spondoolies-Tech on April 12, 2014, 06:39:03 PM

Needless to say, even in this relative trivial project we're doing verification + FPGA validation.

The exact status of the project:
We've submitted final net list to Global Unichip, the tapeout will be in the beginning of May.

One positive thing you could do to assuage the prospective customers is to post some concrete technical information about both your present chip and the future ones.

There is literally a lot of info that you could post without disclosing anything detrimental to the technical competitiveness of your project, e.g. some results of simulations like noise margins versus supply voltage.

If you need inspiration please go read bitfury's past posts.

The technical data is available in the web site. It's a bit outdated. Upon signing an NDA we'll release all the needed information to start a design based on our 1st gen and 2nd gen ASICs. Multiple parties, companies and one collective already got the information.

The updated spec of our 2nd gen ASIC:

Voltage 0.63 V
Total Engines 193
Max frequency at TT corner 984 MHz
Performance 190 GHs
Power 65 W
Power/performance 0.34 W/GHs

Multiple voltages and overclocking points possible.

Does it make you more comfortable ?
Should I post working FPGA pictures ?
Verilog test bench ?

Seriously, we know what we're doing.
The ASICs will arrive on time, working. SP30 will be delivered on time and on spec.

Edit:
Some more information on the system. SP30, like the SP10 will contains two ASICs boards and one management board.
The management board will contain the same TI Sitara processor and FPGA. Beside the FPGA, it's almost identical to Beagle Bone Black.
(Unlike other vendors, we don't ship with hobby boards...)
Each ASICs board contains 15 RockerBox ASICs. The total system output is expected to be over 5.5 TH/s
We've improved our DC2DC design, and we're testing it separately on a test board.

Edit2:
We won't release any information on our 3rd gen ASIC (PickAxe) beside stating again that the design goal is to compete and win in the EH/s (Exa Hash/s) era, while eradicating (by making obsolete) a well known northern farm.