The massive pseudo-random scratchpad concept is not going to prevent ASIC acceleration.
Elaborate please.
SOC with flash blockchain on-chip. You made it more expensive, it takes more silicon, but it still amortizes to the cost of sand, at scale.
so the boolberry scratchpad is now in RAM, small at this time yet increasing rapidly in size. Your proposal for a (presumably high performance) wild keccak ASIC would be some sort of SOC with external flash.. ?