Quote from: lame.duck on March 19, 2012, 09:57:48 PM

Maybe you should repeat your first years electronics course, and the influence of capacitive bus loading and line inductance on speed. Please don't forget that you have only a limited driver strength. I bet just jumper wires with many connectors inbetween and no termination will give intresting results in signal integrity.

I was asked about how the boards are expanded upon, and gave a short answer that summarizes the solution. I'm well aware of the challenges that are encountered when transmitting signals. I didn't going to go into absurd detail, but in anticipation of people getting irritated that I say that a bus is indefinitely extensible, I even said that to maintain performance there would be a limit imposed on devices per bus. That's not to say there aren't other things in place to preserve performance, but I figured it would be sufficient to say that, at least. Apparently it isn't, and I'll try to do better when answering questions in the future.

Quote from: Jason on March 19, 2012, 09:49:59 PM

Consider adding a few extra pieces of hardware that are missing from existing FPGA mining systems in order to allow it to operate in standalone mode. I'm talking only about some SRAM, and ethernet port, and an SD slot.

These I am taking into account, except for perhaps an SD card slot, but I figured the good folks around here would probably just be more interested in what I'm using for hashing, and maybe what I'm using for control, and not so much the infrastructure chips that will make it all possible. The MCU in particular might get replaced with an AVR32 or an ARM device. I won't be running Linux on the MCU, whatever it ends up being, because that's too much overhead. However, given the board's specifications, I'll make sure that if people would like they can program the device with Linux, provided the resources to do so don't make the board cost anymore than it already would.