Quote from: s1gs3gv on September 02, 2014, 09:02:09 PM

Quote

We are still trying to beat our current power estimates and will be making sure our devices are as efficient as possible in this regard

How the hell do you do this if the ASIC has already taped out ?

Well it appeared he's talking about running simulations to determine specs, so I'm betting they're running mining algorithms against the virtual chip and seeing what they can do to pre-tune it. This is SOP, but typically not something you keep doing if you're expecting your chips to arrive any day--but you could do it. Just seems like a waste to me unless they didn't run enough simulations prior. KNC, for example, would do this before completing the design, and then after once the chips were being packaged, as a double-check.

Of course, if they needed to re-check everything because they went with a completely different design at the last minute, it would make more sense...

...Or, if they're continually making last-minute changes to the support hardware and need to know what to expect...

Quote from: anderl on September 03, 2014, 01:39:26 AM

...snip...

Seriously, that image had me rolling.

Quote from: jrose120 on September 03, 2014, 03:14:57 AM

Quote from: anderl on September 03, 2014, 01:58:19 AM

Quote from: jrose120 on September 03, 2014, 01:45:44 AM

i was really worried about the sticker, so glad they showed us the final drawing. Like anyone gives a rat's ass what the sticker on the chip is going to look like. How about some pictures of the chips? And the magic wand you're going to wave to magically make this all ship in a couple of weeks, LOL!

I want to know why they are putting stickers on chips and not etching? If rather see a heat sink on that garbage. I mean won't a sticker keep heat from dissipating?

The chips don't really belong to them, that's why the stickers. If it were thier own custom made chips how freaking hard would it be to have them laser'd at the factory.

My thought as well..