I showed the paper to an ASIC designers and the reply was:
That is not too surprising. Most self-identified "ASIC designers" can't handle domino design (it is a full-custom technique and not supported by "ASIC tools"). Haters gonna hate.
Intel, AMD, NVidia, and ATI all used domino logic exclusively for the critical path of all of their ~50nm-node chips. Apple still uses it at 16nm, Intel has given conflicting information, and I don't know about the other two.