Post
Topic
Board Securities
Re: ASICMINER: Entering the Future of ASIC Mining by Inventing It
by
FUR11
on 24/10/2014, 16:04:02 UTC
Development
The 28nm BE300 engineering batch tapeout was in September 16 with TSMC.
The power efficiency is 0.225W/G to 0.343W/G ranging from core voltage of 0.55V
to 0.70V.

Huh, interesting: Initially the low-power-mode of gen 3 (BE200) was supposed to be <0.2W/GHs, now the planned efficiency is only 0.225W/GHs with the BE300s... How come?
When will the first physical chips be tested, when will we get to know if the power consumption is fine?

Thanks a lot for the update, friedcat!