Quote from: FUR11 on October 24, 2014, 04:04:02 PM

Quote from: friedcat on October 24, 2014, 03:43:48 PM

Development
The 28nm BE300 engineering batch tapeout was in September 16 with TSMC.
The power efficiency is 0.225W/G to 0.343W/G ranging from core voltage of 0.55V
to 0.70V.

Huh, interesting: Initially the low-power-mode of gen 3 (BE200) was supposed to be <0.2W/GHs, now the planned efficiency is only 0.225W/GHs with the BE300s... How come?
When will the first physical chips be tested, when will we get to know if the power consumption is fine?

Thanks a lot for the update, friedcat!

BE200 was supposed to be <0.2W/GHs because we planned that it has some large room of downvoltage. However most room was
eaten by the mistake we made in chip and package design.

For BE300 in theory it is possible to get lower than 0.225W/GH by stressing the voltage down below 0.55V, but we do not have
solid simulation data yet, so let's see after the test chips are out.

December 16 is to be expected for us to get the chips. Testing time varies at 3-10 days since we had much more preparation work already done this time.