Quote from: TimonPeng on October 29, 2014, 03:03:29 PM

Quote from: Ytterbium on July 31, 2013, 08:55:33 PM

Quote from: Simon Barber on July 31, 2013, 08:48:18 PM

We believe one previously announced effort at 28nm is using eASIC, so their cores are *much* bigger than they have to be. Of course their startup costs are much lower too, but it impacts the performance a lot. Look at the η-factor for other 28nm designs.
https://bitcointalk.org/index.php?topic=119668.0

The η-factor thing is total nonsense for ASICs if they're thermally limited.

Also, KnC is using a standard cell design, not an eASIC 'easycopy' or whatever. eASIC is just one of the companies they work with.

For a 400 GH/s ASIC, we are talking about:
200 cores @ 2 GHz -> 100 mm2 die (probably to high supply voltage required to meet power constraints)
400 cores @ 1 GHz -> 200 mm2 die (most feasible solution)
800 cores @ 500 MHz -> 400 mm2 die (would be the complete reticle size)

I don't say, that such an implementation is impossible. But it's is extremely risky and the thermal and power issue will be the hell. And based on what they have shown so far, I would say they are far away from tape-out.

The only thing which confuses me a bit is that Uniquify LOI. Why should Uniquify risk its reputation with false statements?
But maybe they just don't care about it, because the Bitcoin ASIC business always will be low volume and not that important for them.

I think you might have missed the last year and a bit.