Quote from: Franktank on November 28, 2014, 08:34:33 PM

Quote from: amhash on November 28, 2014, 06:35:30 AM

Update

Some details of BE300:

Process: tsmc 28nm hpc

Package: fclga (5mm x 5mm)

Normal Mode:
0.7v vdd
6gh/s per chip
8gh/s-12gh/s per chip for mass production
0.343w/g on chip
~0.3w/g on chip for mass production

Low Power Mode:
0.55v vdd
4.5gh/s per chip
6gh/s-9gh/s per chip for mass production
0.225w/g on chip
~0.2w/g on chip for mass production

The schedule of BE300 producing: First batch production will be done next Feb.

Are there folks that happen to know more about this elaborate on this further? Other than just being a little more efficient than BE200, it doesn't seem like that great of an improvement for a die shrink (40nm -> 28nm). Please excuse my ignorance, I'm more of a biochemist and not familiar with the specifics of chip R&D.

0.2-0.343 w/gh is not "a little more efficient".