Quote from: Lionel on March 15, 2019, 02:44:52 PM

Quote from: hosseinamin on March 14, 2019, 04:14:01 PM

FPGA can be a possible solutions for more controlled transaction signing. Since these devices are made for engineers to build chips.

That would be a good compromise.
I am not into FPGAs, so i ask you: is it easy to verify there aren't suspicious components in there?

For motherboards it is not easy to check.
See https://tech.slashdot.org/story/17/11/07/1041236/minix-intels-hidden-in-chip-operating-system
or https://itsfoss.com/fact-intel-minix-case/

Or even for CPU cores: https://www.tomshardware.com/news/x86-hidden-god-mode,37582.html

RISC-V ISA has implemented and was developed using FPGA's. These devices are used for testing gates before taping it out as an ASIC (CPU is a programmable ASIC) .
Well these devices have several GPIO pins for communicating with other devices. One can limit amount of IO's they use and use an open-source communication method to make sure it can only do one thing.

And about verification of loaded bitstream. Best option is to build and upload the bitstream.

How much one should think ahead to break into this device?

RISCV is open-source. You can build bit-stream of it. Or even add custom instructions to it. I'm not sure how these devices store data, For storing private key.