nevermind, ive got around it myself, using http://tivadj-tech.blogspot.in/2012/09/certificate-check-error-when-installing.html

Anyone have any joy getting the CM1 working in Windows 8?

This is the problem im having;
http://www.unstable.org.uk/images/temp/Windows8.png

I would just like to again thank everyone for their hard work on everything getting us to this point. After following ebereon's little guide ive tuned my cairnsmore1's to run at a nice level;

http://www.unstable.org.uk/images/temp/mpbm.png

This is powered directly from an old ATX psu (200W Max on 12V @ 8A (which should surely be 12V*8A=96W??))

However i have a small issue where I occasionally lose all 4 com ports (Win 7 64bit directly connected to pc) at random intervals. I have to disconnect the usb and power cycle the cairnsmore1's then reconnect the usb to get them back. The idea is to move these cairnsmore1 to my datacentre, to run off of one of my linux machines, so this is not an ideal situation if it continues to happen.

Ive changed the usb cable which seems to have helped somewhat (as you can see 20 hours from the image above), and ive ordered one of those recommended 35 port usb hubs to help also, is there anything else i can do? (I guess worst case i can remove the 5v from the usb cable and hook the atx up to the remote power bar).

Im good to release also

I would just like to thank all that have been working on the bitstreams and such, ive been away for a month (a weeks holiday and then waiting on my rma return, etc).

Flashed the 2 new boards to controller 1.5 and shortfin_dcmwd4e_ed_test_200_overclock.bit for the hour that both have been running, i have average Utility per pair of 5~5.5, which seems pretty good to me, such a change from my poorly board before

For anyone that has done the up/down cable, is there anything special i need to change in my run commands? I know i have to connect the cable and set the master/slave dip, but is that it, does the dual stack just present as 8 com port as it would do individually?

My board #18 is back with Enterpoint, waiting to receive my replacement

Cheers for that, ive now fixed my cgminer

does anyone have any pointers/ideas?

Switching to BFGMiner solved my issues

Ive managed to get it to generate the /dev/ttyUSB0 device now, by adding the following udev rule;
but... i now get the following;
im sure if it was that hot, it wouldve gone into meltdown by now!

When copying the twin_test.bit and shipping_test.bit files, did you not run;

Although thinking about it, looks like you mustve downloaded "Twin Bitstream Update (Windows Version)" (http://www.enterpoint.co.uk/cairnsmore/twin_test.zip) from looking at that zip, it isnt included in there, so you will also need to download the older version "Cairnsmore1 Bitstreams and Instructions" (http://www.enterpoint.co.uk/cairnsmore/CairnsmoreProgramming.zip) which does include the necessary .bit file

Hi,

Ive been running my BFL single on my Win7 machine for some time now, i had to visit the datacentre today, so i took the single in with me to add to the mining rigs already there, although im having issues getting it detcted.

lsusb shows it is there;
but i have no /dev/ttyUSBn devices to connect to

if i modprobe ftdi_sio, i then get the following entries under lsmod;

I'm running centos 5.8 on this machine, am i likely to be missing some udev rules or such to generate the /dev device?

TIA

add another 1BTC to the pot

Essay sent as requested

Im not 100% confident in this board at all;
http://www.unstable.org.uk/images/temp/twin_test.bit.png
If others are getting a U of ~5, you can see im getting about ~2 (cgminer reports similar figures)

As you can see, its quite bad;
http://www.unstable.org.uk/images/temp/190M_V3.bit.png

Perhaps its time to contact enterpoint to return this board for testing/replacement?

Is anyone else seeing any similar issues to the below with their board?

Mine is 62-0018 updated to rev 1.3; Ive also tried 2 different machines and multiple different usb leads, all of which seem to give similar results;

(All excerpts below are from latest git MPBM with ebereon's Cairnsmore worker.)

For starters my job intervals seem way off compared to the likes of ebereon's previously posted.

shipping_test.bit (DIP's setup as per shipping_test.pdf)
 Permanent Flash;

twin_test.bit (DIP's setup as per twin_test.pdf)
 Temporary Flash
 Notes
   CM2 (FPGA3) gets 50-70% less shares than CM1 (FPGA0) (Average Utility of 1.4-1.5 & 0.8-0.9)
   Also quite a few of the following errors on both FPGA's
Permanent Flash;
 Notes
   CM2 (FPGA3) gets 50-70% less shares than CM1 (FPGA0) (Average Utility of 1.4-1.5 & 0.8-0.9)
   Also quite a few of the following errors on both FPGA's
    Watchdog triggered: 27276.511018 MHashes without share

190M_V3.bit (DIP's setup as per twin_test.pdf)
 Temporary Flash
 Notes
   First few shares ok, then;
Permanent Flash
  Not even detected

200M_BETA.bit (DIP's setup as per twin_test.pdf)
 Temporary Flash
  Not even detected
 Permanent Flash
  Not even detected

I know we're not at full potential, and no sign of any full potential yet, but id at least like to get this one board working ok before i dump a load more cash into more boards

Ive flashed the 1.2 controller update and things seem a bit better for me so far, previously i was seeing the second pga only producing 50% accepted shares compared the first pga, tested over multiple 12/24/48 hour runs, i.e.;
so far (after only 10 mins or so) both pga seem to give the same number of accepted shares;
ill report more when its been running longer.

after 13 hours, not a massive difference from before;

I managed to get it working on Centos now

Heres how;

1. Followed kano's instructions from https://bitcointalk.org/index.php?topic=85228.msg946289#msg946289
I didnt want to install the newly built rpm for my whole system (repo protections, etc), so i then modified the vanitygen build to use the BUILD directory;
2. Edit Makefile as follows;
3. Build the vanitygen/oclvanitygen
As per the openssl build, I dont want to install it fully, so..
4. Copied to my homedir and chown'd to my user as my user owns the DISPLAY:0 session.
5. Ran the oclvanitygen with BUILD lib dir environment variable set (so as to load the right libcrypto.so)
which gave me a list of device numbers
6. Re-ran oclvanitygen with the OCL device number (-d )
7. Watch as you realise that to find an 8 digit vanity address could take a long time on a single 6970.

Hope this helps anyone else

I just the found the same also, time to put twin_test.bit back on and leave it overnight now (3am) to see how it does

well done ebereon, ill sort another donation when im at my wallet machine

did you stick to the twin_test.bit or go with the 190M_V3.bit bitstream for the SPI

and proof for the -I is in the man page (http://xc3sprog.sourceforge.net/manpage.php) d'oh

I normally program with SW6 1 on as per the pdf, but ive tried with SW6 #1 off for both programming and operation and its definately COM22/COM23 for me;


CGminer works at 115,200 baud, so thats why SW6 1 needs to be off for it